Microprocessor manufacturers such as AMD, Intel and Sun Microsystems have recently been implementing approaches to chip-level power management. Such approaches reduce power for chips by clock gating and/or by dynamic voltage and frequency scaling. Scaling back the power to the chips in a server is done out of a desire to save energy and electricity costs.
The various operating states for microprocessor as a result of power management are referred to as power level states, or P-states. Almost all computer industry publications on chip-level power management plot the average power consumed by the chip on the vertical axis over time on the horizontal axis, for each of the available P-states for operating the chip. However, this widespread use of a power curve has led to a significant fallacy throughout the computing industry.
In that regard, while the power level for a server does of course drop with chip-level power management, computations take longer to complete. This undesirable situation is analogous to an automobile manufacturer dynamically scaling back engine horsepower in a misdirected effort to conserve oil. For example, horsepower could be scaled back by disabling engine cylinders from perhaps eight cylinders down to perhaps one cylinder. If, however, a driver still needs to travel a fixed distance from Point A to Point B, that driver may be unhappy to learn that under “horsepower scaling” it not only takes significantly longer to make the trip, but more gasoline must be used as well.
Similarly, while the average power level is reduced with chip-level power management, the consumed energy is typically greater. It is significant to note that every electricity supplier in the United States charges not for power measured in kilo-Watts (kW), but for consumed energy measured in kilo-Watt Hours (kWH). That is, electricity suppliers do not charge for power levels as depicted on the power curves widely used in power management discussions in the computer industry, but for the integral of power over time, which is the area under the power curve.
In most cases, the total energy consumed is actually greater with chip-level power management. In that regard, measurements of work done in various enterprise servers show that chip-level power management typically wastes significant energy, thereby increasing the amount of fuel burned for energy production and the accompanying power plant emissions, driving up the electricity costs for the datacenter, and resulting in longer wait times for computation results.